Hardware in the Loop

Not written yet. Questions to answer here: what hardware-in-the-loop testing means and what it is trying to catch that a simulation does not, what breaks about ordinary CI when the test target is a scarce physical device (you cannot spin up a hundred of them, they hold state between runs, and they fail in ways a container does not), how devices get scheduled and reset between runs, what a test bench needs to record for a failure to be diagnosable afterwards, where simulation is the right substitute and where it silently is not, and what changes when the firmware under test is on an implanted device.